Date of Submission

7-2025

Date of Award

7-12-2025

Institute Name (Publisher)

Indian Statistical Institute

Document Type

Master's Dissertation

Degree Name

Master of Technology

Subject Name

Cryptology

Department

Cryptology and Security Research Unit (CSRU-Kolkata)

Supervisor

Rijmen, Ir. Vincent

Co-Supervisor (if any)

Roy, Bimal Kumar

Abstract (Summary of the Work)

The demand for symmetric-key cryptography implemented in hardware is growing due to the increasing need for faster, more efficient, and secure encryption in small devices. However, implementing block ciphers in hardware that are side-channel secure remains a challenging goal. This holds true because there exist sophisticated but well-studied attacks such as Differential Power Analysis, which uses the correlation between power consumption of a device and the information on it to allow attackers with physical access to the cryptographic device to get information about secret data. Masking is one of the techniques that is used to provide security against sidechannel attacks. There are various kinds of masking, including widely recognized Threshold Implementations and Domain-Oriented Masking. However, to mask a secret, one must first generate randomness. Generating secure randomness usually comes at the cost of increased area and time in hardware. In this master’s thesis project, we study ways of reducing or reusing the randomness used in masked hardware implementations of symmetric-key block ciphers and calculate the bounds on the advantage of a threshold probing adversary to determine if the countermeasures preserve security. We then use PROLEAD to verify the probing security and compare its result with our estimations.

Control Number

CrS2309

DOI

https://dspace.isical.ac.in/items/dc840a58-f3e9-4755-ae34-9e520202d87b

DSpace Identifier

http://hdl.handle.net/10263/7630

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