Display Package For General Floorplan and Global Routing in Stair-Case Channel.

Date of Submission

December 1997

Date of Award

Winter 12-12-1998

Institute Name (Publisher)

Indian Statistical Institute

Document Type

Master's Dissertation

Degree Name

Master of Technology

Subject Name

Computer Science

Department

Advance Computing and Microelectronics Unit (ACMU-Kolkata)

Supervisor

Sur-Kolay, Susmita (ACMU-Kolkata; ISI)

Abstract (Summary of the Work)

This dissertation addresses of two problem in VLSI layout design. The first one is , the implementation of graphics modulo package for general floorplan considering the unified approach to topology generation and arca optimization of general floorplans 3) and the 2nd one is , the formulation of an heuristic algorithm for two-terminal net and multi-terminal net in stair-case channels on the floorplan.

Comments

ProQuest Collection ID: http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:28843149

Control Number

ISI-DISS-1997-35

Creative Commons License

Creative Commons Attribution 4.0 International License
This work is licensed under a Creative Commons Attribution 4.0 International License.

DOI

http://dspace.isical.ac.in:8080/jspui/handle/10263/6209

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