Efficient Reduction of Resources and Noise in Discrete Quantum Computing Circuits

Date of Submission

1-1-2024

Date of Award

10-1-2024

Institute Name (Publisher)

Indian Statistical Institute

Document Type

Doctoral Thesis

Degree Name

Doctor of Philosophy

Subject Name

Computer Science

Department

Advance Computing and Microelectronics Unit (ACMU-Kolkata)

Supervisor

Sur-Kolay, Susmita (ACMU-Kolkata; ISI)

Abstract (Summary of the Work)

Quantum computers have shifted from a subject of theoretical interest to reality in recent years with multiple devices now available at research industry labs such as IBM, Google, and IonQ. However, quantum systems are highly susceptible to noise. Interaction with the environment corrupts the information content, leading to unreliable computation. Near-term quantum computers do not have sufficient qubits to incorporate error correction. Therefore, other mechanisms are studied to lower the effect of noise. Quantum Approximate Optimization Algorithm (QAOA) is an algorithm family for finding approximate solutions to combinatorial optimization problems. Any such problem can be represented as a graph, and the number of 2-qubit gates in the corresponding circuit scales linearly with the number of edges. 2-qubit gates are one of the noisiest components in current hardware. This thesis proposes three hardware-independent algorithms to lower the number of 2-qubit gates while ensuring functional equivalence. Finally, a modification to these algorithms is proposed when the underlying hardware connectivity and layout of the circuit is known. Another method, called circuit cutting, where a circuit is partitioned into multiple smaller subcircuits, is shown to effectively lower noise. The subcircuits are computed individually, and the outcome is constructed on a classical computer. This thesis proposes two error mitigation techniques, targeted particularly for circuit cutting, which significantly improve the fidelity of the outcome. These techniques for lowering the effect of noise are not sufficient for arbitrary long quantum computation; there quantum error correction (QECC) is mandated. The second part of this thesis shows the challenges of designing a ternary QECC from its binary counterpart. Naive efforts require two-step error correction, leading to a significant increase in the gate cost of the QECC circuit. Next, a necessary condition for stabilizer formulation is provided which allows easy carry-over of binary QECC to ternary, making error correction a single step. For near-term devices, the decomposition of a 3-qubit Toffoli gate by temporary access to higher dimensions is shown to provide an exponential reduction in the depth of the decomposed circuit. The final chapter studies provides an analytical criterion for which the resource requirement of qutrit-assisted decomposition, when equipped with error correction, remains lower than the qubit-only decomposition. Overall, this thesis contributes both to near-term and long-term quantum computing. The findings from Part I provide useful methods to improve the performance of algorithms in current quantum devices. Part II gives valuable insight into the challenges of incorporating near-term methods in conjunction with error correction and the design of higher dimensional QECC from binary codes.

Comments

ProQuest Collection ID: https://www.proquest.com/pqdtlocal1010185/dissertations/fromDatabasesLayer?accountid=27563

Control Number

ISILib-TH

Creative Commons License

Creative Commons Attribution 4.0 International License
This work is licensed under a Creative Commons Attribution 4.0 International License.

DSpace Identifier

http://dspace.isical.ac.in:8080/jspui/handle/10263/2146

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