Date of Submission

7-25-1995

Date of Award

7-25-1996

Institute Name (Publisher)

Indian Statistical Institute

Document Type

Doctoral Thesis

Degree Name

Doctor of Philosophy

Subject Name

Computer Science

Department

Advance Computing and Microelectronics Unit (ACMU-Kolkata)

Supervisor

Sinha, Bhabani Prasad (ACMU-Kolkata; ISI)

Abstract (Summary of the Work)

Many real-life applications such as image processing, weather forecasting, digital signal processing, etc., require large amount of computations. By distributing the task among several processors, one can appreciably reduce the computation time. To solve complex problems, several computer architectures using multiple processors have been introduced. Recent developments in IC technology have made it economically feasible to construct multiple processor systems consisting of hundreds or thousands of processors.There are two types of multiprocessor systems (PS87). One is tightly coupled, where the processors share a common clock and/or memory. The other is loosely coupled, where each processor runs independently with a local clock and a local memory. The interprocessor communication in such systems plays a vital role in the overall throughput and resource utilization. One possible way of effecting inter- processor communication is through the use of an interconnection network. Thus, the interconnéction network has become a critical component in such systemsInterconnection networks can be classified into two categories : static and dynamic. In a static network, links between two processors are fixed once for all and cannot be reconfigured for direct connection to other processors. Ring, star, mesh (L93b), hypercubes (H69], etc. are examples of static networks. In a dynamic network, the links can be reconfigured by setting the active switch elements of the network. Examples of such dynamic topologies are baseline, reverse baseline, banyan, omega, Benes, shuffle-exchange, etcVarious issues related to static interconnection networks include i) design of a suitable network topology, i) analysis of the topological properties, reliability and fault-tolerance, etc. of a network, ii) developing routing algorithms, iv) mapping of algorithms on a network for different types of applications, etc. Some of these points are briefly explained as follows.1) Network Topology : A static interconnection network can be modeled by a graph G = (V, E) with Vas the set of nodes and E as the set of edges such that the nodes represent the processors and the edges represent the communication links among the processors. Design of a suitable network topology plays a vital role in optimizing various system paranmeters, e.g., cost of the network, communication delay, fault-tolerance, etc.2) Reliability and Fault-tolerance : With the introduction of a large number of processors, the probability of failure of the processors and the links increases significantiy. Many critical real-life applications using multiprocessors need a very low failure rate. Hence, the design of fault-tolerant multiprocessors systems is an important issue, A fault-tolerant interconnection network can tolerate faults to some degree and still provides gracefully degradable performance.

Comments

ProQuest Collection ID: http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:28842896

Control Number

ISILib-TH255

Creative Commons License

Creative Commons Attribution 4.0 International License
This work is licensed under a Creative Commons Attribution 4.0 International License.

DOI

http://dspace.isical.ac.in:8080/jspui/handle/10263/2146

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