Reliable logic design with defective nano-crossbar architecture
Document Type
Conference Article
Publication Title
2016 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics, DISCOVER 2016 - Proceedings
Abstract
Emerging nanoscale devices now offer viable options for replacing conventional CMOS-based designs. In this work, we study the problem of logic synthesis using nanoscale 2-D crossbar-switch architecture. Despite having several advantages, these tiny devices suffer from high defect-density because of process variations that affect their dimensions and shapes. As a result, several defective junctions often appear as spatially-clustered in nano-crossbar structures following manufacture. Additionally, the junctions that lie in the close proximity of defective ones are also prone to become faulty in the near future. Such defect-free junctions are not so reliable from the viewpoint of logic synthesis. The objective of this work is to determine a large rectangular region that is devoid of any such defects. Such a sub-crossbar region can be reliably used for mapping Boolean functions. In order to locate such regions, we use an efficient search technique based on defect geometry and report experimental results by varying crossbar-size and defect-density.
First Page
47
Last Page
52
DOI
10.1109/DISCOVER.2016.7806231
Publication Date
1-1-2016
Recommended Citation
Kule, Malay; Rahaman, Hafizur; and Bhattacharya, Bhargab B., "Reliable logic design with defective nano-crossbar architecture" (2016). Conference Articles. 791.
https://digitalcommons.isical.ac.in/conf-articles/791
