Low-Complex & Low-Cost Hardware Modelling of DCVNS Scheme for IoT Applications
Document Type
Conference Article
Publication Title
2022 IEEE 4th PhD Colloquium on Emerging Domain Innovation and Technology for Society, PhD EDITS 2022
Abstract
In this paper, a low-complexity and low-cost hard-ware model of a novel source encoding scheme termed Dualmessage Compression with Variable Null Symbol (DCVNS) is presented. Our recommended DCVNS approach addresses the process of interleaving of message bits originating from different sources, or from different sensing times of the same source. This interleaved message's two successive bits are encoded and rendered by one of four symbol values, leading in a twofold reduction in the overall message length. Because Silent Communication is being used, the transmitter is maintained in deep-sleep state throughout the interim time of the high frequent dominant symbol appearing in the source-coded message during transmission. Our proposed design shows the hardware detail about the selection of the most dominating symbol which is dynamic in nature. Furthermore, the transmitter employs lowcost hybrid modulation/demodulation features integrating noncoherent FSK and ASK, designed to work in low-power and cost-effective transmission mode. Our proposed model is extremely suitable for circumstances in which a receiver node collects temporal or spatial data from two sources and transfers it to a sink node in most of the smart IoT applications.
DOI
10.1109/PhDEDITS56681.2022.9955293
Publication Date
1-1-2022
Recommended Citation
Majumder, Pratham; Chatterjee, Punyasha; and Ghosh, Abhishek Siddhartha, "Low-Complex & Low-Cost Hardware Modelling of DCVNS Scheme for IoT Applications" (2022). Conference Articles. 436.
https://digitalcommons.isical.ac.in/conf-articles/436