Dominance Constrained Drawing of Complete Binary Trees and Directed Acyclic Graphs on a 2-D Planar Grid.

Date of Submission

December 2008

Date of Award

Winter 12-12-2009

Institute Name (Publisher)

Indian Statistical Institute

Document Type

Master's Dissertation

Degree Name

Master of Technology

Subject Name

Computer Science

Department

Electronics and Communication Sciences Unit (ECSU-Kolkata)

Supervisor

Chanda, Bhabatosh (ECSU-Kolkata; ISI)

Abstract (Summary of the Work)

1.1 VLSI Placement and Graph DrawingIn synchronous VLSI chips, signal from a single clock is fed to a number of modules. The clock routing scheme used determines the clock arrival time for different modules. In general, all functional units do not receive the clock signals simultaneously. The maximum difference in the clock arrival times at two components is called clock skew. The problem of timing skew between the clock and signal arrival is to be managed, to prevent increase in delay. H-tree [7, 8] layout, example for 4 modules in Figure 1.1, is commonly used but we advocate an alternate method: to route the signal wires and the clock wires together in parallel so that the skew between the clock and the signal vanishes, effectively. Figure 1.2 gives a schematic representation of the timing skew.Having the clock wires routed parallel to the signal wires, the clock arrival time is matched with that of the signal. Due to inherent dependence among the modules, thesignal wires must obey the data dependence and so, must the clock wires. As the signal net is specific to the component for which it is being routed, while clock wire feeds all the modules, the clock routing is done separately. To still have parallel clock and signal wires, the data dependence forces some constraints into the VLSI placement phase. It is required that gates or modules must be placed in a way that their signal arrival times are greater than of those, from which they receive their input signals. We wish to analyze the area requirement for the placement of gates under these precedence constraints.These placement constraints are covered by dominance constraints. Dominance drawing is a type of graph drawing where a given directed graph is drawn under dominance constraints. We shall formally define dominance constraints later in chapter 2, for the moment we give a brief introduction of graph drawing and its various objectives.In graph drawing the vertices and edges of the input graph are mapped onto another graph to satisfy some constraints. Wide varieties of graph drawings have been described in the literature.1.1.1 Types of graph drawingsPolyline drawing : Each edge is a polygonal chain (Figure 1.3(a)).Straight-line drawing : Each edge is a straight-line segment (Figure 1.3(b)).Orthogonal drawing : Each edge is a chain of horizontal and vertical segments (Figure 1.3(c)).Grid drawing : Polyline drawing such that vertices, crossings and bends have integer coordinates.Figure 1.3: Types of drawings; (a) Polyline drawing of K3,3; (b) Straight-line drawing of K3,3; (c) Orthogonal drawing of K3,3; (d) Planar Upward drawing of an acyclic digraphUpward drawing : Drawing of a digraph where each edge is monotonically nondecreasing in the vertical direction (see Figure 1.3(d)).Dominance drawing: Upward drawing of an acyclic digraph such that there exists a directed path from vertex u to vertex v; if and only if x(u) ≤ x(v) and y(u) ≤ y(v), where x(.) and y(.) denote the coordinates of a vertex.hv-drawing : Upward orthogonal straight-line drawing of a binary tree such that the drawings of the subtrees of each node are separated by a horizontal or vertical line.Bend : In a polyline drawing, point where two segments part of the same edge meet (Figure 1.3(a)).Crossing : Point where two edges intersect (Figure 1.3(b)).Most of the works done earlier in domain of graph drawing achieve almost planar drawings, i.e. with a limited number of edge crossings. This is to ensure effective visualization of the drawing and address the problem of constructing geometric representations of graphs, a major aspect of the emerging field of information visualization. Graph drawings have a wide variety of applications in various fields such as Software Engineering, Databases, VLSI Routing, and Biology.

Comments

ProQuest Collection ID: http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:28843098

Control Number

ISI-DISS-2008-212

Creative Commons License

Creative Commons Attribution 4.0 International License
This work is licensed under a Creative Commons Attribution 4.0 International License.

DOI

http://dspace.isical.ac.in:8080/jspui/handle/10263/6375

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