Priority Arbiter PUF: Analysis
Article Type
Research Article
Publication Title
Discrete Applied Mathematics
Abstract
The Priority Arbiter-based Physical Unclonable Function (PA-PUF) is a one-way function implemented in hardware, where output or response bits, corresponding to a given set of challenge bits, are influenced by the device-specific parameters. An n-length PA-PUF can be represented as an n-variable Boolean function. The research we conducted demonstrates the exploration of Boolean functions obtained by implementing a PA-PUF construction with randomly selected delay parameters. We observe that the set of Boolean functions generated from PA-PUF is significantly larger than the set of Boolean functions generated from classical Arbiter-based PUF. Further, we look into the bias estimation of the response bit generated from PA-PUF towards the impact of changing specific bits in the challenge input. Finally, we perform a comparative analysis on PA-PUF to study its cryptographic properties and a detailed analysis of the machine learning attacks.
First Page
71
Last Page
95
DOI
10.1016/j.dam.2024.05.013
Publication Date
10-30-2024
Recommended Citation
Kansal, Meenakshi; Roy, Animesh; Roy, Dibyendu; Bodapati, Srinivasu; and Chattopadhyay, Anupam, "Priority Arbiter PUF: Analysis" (2024). Journal Articles. 5012.
https://digitalcommons.isical.ac.in/journal-articles/5012