A study on flare minimisation in EUV lithography by post-layout re-allocation of wire segments

Article Type

Research Article

Publication Title

IET Circuits, Devices and Systems


The feature size in Integrated Circuits (ICs) has been scaling down aggressively, thereby posing more challenges in their manufacturability. Conventional immersion lithography using a laser of 193 nm wavelength produces layouts having distortions that degrade performance significantly. To overcome this bottleneck, Next-Generation Lithography (NGL) technologies are being developed. Extreme Ultraviolet Lithography (EUVL), one of the popular NGLs, which uses a light of 13.5 nm wavelength. However, irregularities on the photo reflective surface of clear-field masks used in EUVL, scatter the incident light and cause flare that in turn results in layout pattern distortions and critical dimension (CD) violations. One of the approaches to counter the effect of flare is to utilise dummy metal fills. But this incurs additional mask cost. Herein, a method to reduce the flare variation as well as the average flare distribution for a layout by perturbation of wire segments, without affecting performance at the post-layout phase, is proposed. The results show reductions of 20% and 11% on an average in the flare variation and flare mean, respectively, compared to that for the original layout for two different flare models studied on three standard sets of benchmark suites. Consequently, a reduction in the dummy fill demand of a similar magnitude is thus obtained.

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Open Access, Gold

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