Title

Shared Pattern History Tables in Multicomponent Branch Predictors with a Dealiasing Cache

Article Type

Research Article

Publication Title

IEEE Embedded Systems Letters

Abstract

In this letter, we study the problem of designing multicomponent branch predictors for low-resource embedded systems. The highlight of our design is a shared pattern history table with a tiny dealiasing cache for intercomponent interference resolution. Experiments on the CBP-5 traces are shown to record the performance in terms of prediction accuracy. Synthesis results generated using the Synopsys design compiler with TSMC 90-nm libraries confirm the area and power benefits of our design.

First Page

95

Last Page

98

DOI

10.1109/LES.2019.2957512

Publication Date

9-1-2020

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