Date of Submission

5-24-2002

Date of Award

5-24-2003

Institute Name (Publisher)

Indian Statistical Institute

Document Type

Doctoral Thesis

Degree Name

Doctor of Philosophy

Subject Name

Computer Science

Department

Advance Computing and Microelectronics Unit (ACMU-Kolkata)

Supervisor

Bhattacharaya, Bhargab Bikram (ACMU-Kolkata; ISI)

Abstract (Summary of the Work)

Interest in digital images stems mostly from its application to various areas of computer vision [33, 57] and pattern recognition [145). Problems include robotic vision and con- trol, geographic and topographic map matching, target recognition, space applications, character recognition, scene analysis, fingerprint and face recognition, etc. Lately, with the advent of content-based image retrieval (CBIR) and proliferation of the Internet, digital imaging applications are in vogue now than ever before. In almost all the cases, the data size is enormously large, and at the same time, fast on-line as well as real- time computation is needed. For example, in fingerprint processing, each image frame is of size 480 x 512 with 256 gray levels; 256 gray levels requiring 8 bits. Thus, the total image size is 245760 bytes 0.25MB. Multimedia and video applications require frame rates of 50-80 frames per second. The throughput requirements of storage and processing for these applications can run into giga operations per second (gops) [116]. However, most of the operations are locally repetitive and modular, with a high degree of parallelism among these tasks. Parallel processing and VLSI technology provide a suitable paradigm for designing high performance hardware, systems-on-chip for real time solutions to such applications. VLSI technology has made rapid strides leading to efficient implementation of chips. This creates the scope for designing new architec- tures for application specific needs giving rise to application specific integrated circuits (ASIC).The essence of developing specific architectures for image processing applications is to exploit the special forms of parallelism inherent in those algorithms. Most of the archi- tectures used for computer vision and imaging applications can be classified into Single Instruction Multiple Data (SIMD) and Multiple Instruction Multiple Data (MIMD) ar- chitectures. Although SIMD and MIMD architectures are powerful, still another form of parallelism in image data can be found in the local neighborhood around each pixel. The neighborhood pixels can be processed simultaneously for local overlapped opera- tions to exploit a temporal parallelism. Pipelining can be employed to perform such operations. Based on two types of parallelisms, temporal and spatial, parallel computers can be classified into pipeline computers and array processors. For on-chip design of image processing hardware, the concerned algorithm should be tailored for a VLSI architecture. Many such earlier works can be found in [2, 26, 32, 34, 48, 60, 61, 72, 79, 81, 87, 99, 107), [114]-[117), [132, 133).Apart from architectural aspects of digital imaging, many tasks in computer vision and CBIR require new and efficient algorithms for faster operation. Techniques bor- rowed from the inter-disciplinary areas like computational geometry, multidimensional data structures and database can be fused together to provide good solutions to these problems. CBIR involves indexing and searching in higher-dimensional feature spaces. Images are indexed using their features. Determination of compact, topologically invari- ant, easily computable features for image characterization is a fundamental problem. In this thesis, we have addressed some of the pertinent issues on combinatorial techniques for digital image characterization, and devoloped new algorithms and VLSI architectures for on-chip implementation. We further demonstrate applications of these techniques to image searching, CBIR, fingerprint analysis and matching. In Chapter 2, we report new results on Euler number and an architecture for VLSI implementation. Euler number is a well known combinatorial feature and is defined as the difference of the number of connected components (objects), and the number of holes in a binary image. This is an important topological feature that remains invariant under arbitrary rubber-sheet transformations.

Comments

ProQuest Collection ID: http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:28842908

Control Number

ISILib-TH135

Creative Commons License

Creative Commons Attribution 4.0 International License
This work is licensed under a Creative Commons Attribution 4.0 International License.

DOI

http://dspace.isical.ac.in:8080/jspui/handle/10263/2146

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